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IEEE Symposium on Low-Power and High-Speed Chips

召开年：2013
召开地：Yokohama(JP)
出版时间：-

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1.Processor with 4.9-#x03BC;s break-even time in power gating using crystalline In-Ga-Zn-oxide transistor

机译：使用晶体In-Ga-Zn-氧化晶体管在电源门控中具有4.9μs收支平衡时间的处理器
- 作者：Kobayashi Hidetomo;Kato Kiyoshi;Ohmaru Takuro;Yoneda Seiichi
- 会议名称：《IEEE Symposium on Low-Power and High-Speed Chips》 | 2013年
- CAAC IGZO;
- break even time;
- crystalline IGZO;
- normally off computing and shadow memory;
- power gating;
2.RXv2 processor core for low-power microcontrollers

机译：用于低功耗微控制器的RXv2处理器内核
- 作者：Otani Sugako;Ishikawa Naoshi;Kondo Hiroyuki
- 会议名称：《IEEE Symposium on Low-Power and High-Speed Chips》 | 2013年
- dual-issue core;
- low-power;
- microcontrollcr;
- mstruction fetch umt;
3.A scalable 3D heterogeneous multi-core processor with inductive-coupling thruchip interface

机译：具有电感耦合通芯片接口的可扩展3D异构多核处理器
- 作者：Miura Noriyuki;Koizumi Yusuke;Sasaki Eiichi;Take Yasuhiro
- 会议名称：《IEEE Symposium on Low-Power and High-Speed Chips》 | 2013年
4.A multi-granularity parallelism object recognition processor with content-aware fine-grained task scheduling

机译：具有内容感知细粒度任务调度的多粒度并行对象识别处理器
- 作者：Park Junyoung;Hong Injoon;Kim Gyeonghoon;Kim Y ouchang
- 会议名称：《IEEE Symposium on Low-Power and High-Speed Chips》 | 2013年
- computer architecture;
- multicore processor;
- object recognition;
- task scheduling;
5.Power efficient realtime super resolution by virtual pipeline technique on a server with manycore coprocessors

机译：在具有多核协处理器的服务器上通过虚拟管道技术实现电源高效的实时超分辨率
- 作者：Ishizaka K.;Miyamoto T.;Akimoto S.;Iketani A.
- 会议名称：《IEEE Symposium on Low-Power and High-Speed Chips》 | 2013年
- Coprocessor;
- Manycore;
- Power Efficiency;
- Super Resolution;
6.Automatic parallelization, performance predictability and power control for mobile-applications

机译：移动应用程序的自动并行化，性能可预测性和功率控制
- 作者：Hillenbrand Dominic;Hayashi Akihiro;Yamamoto Hideo;Kimura Keiji
- 会议名称：《IEEE Symposium on Low-Power and High-Speed Chips》 | 2013年
7.HW/SW approaches to accelerate GRAPES in an FU array

机译：硬件/软件方法可加速FU阵列中的GRAPES
- 作者：Wang Wei;Yao Jun;Zhang Youhui;Xue Wei
- 会议名称：《IEEE Symposium on Low-Power and High-Speed Chips》 | 2013年
8.Parallelization of automotive engine control software on embedded multi-core processor using OSCAR compiler

机译：使用OSCAR编译器在嵌入式多核处理器上并行化汽车发动机控制软件
- 作者：Kanehagi Yohei;Umeda Dan;Hayashi Akihiro;Kimura Keiji
- 会议名称：《IEEE Symposium on Low-Power and High-Speed Chips》 | 2013年
- automatic parallelization;
- automobile;
- embedded system;
- multi-core processor;
9.Hardware support for resource partitioning in real-time embedded systems

机译：实时嵌入式系统中对资源分区的硬件支持
- 作者：Honmura Tetsuro;Kondoh Yuki;Yamada Tetsuya;Takada Masashi
- 会议名称：《IEEE Symposium on Low-Power and High-Speed Chips》 | 2013年
- ExVisor/XVS;
- PAM;
- Real-time;
- multi-core;
- resource partitioning;
- resource protection;
10.A flexible insertion policy for dynamic cache resizing mechanisms

机译：动态缓存大小调整机制的灵活插入策略
- 作者：Sato Masayuki;Tobo Yusuke;Egawa Ryusuke;Takizawa Hiroyuki
- 会议名称：《IEEE Symposium on Low-Power and High-Speed Chips》 | 2013年
- cache memory;
- dynamic cache resizing;
- energy consumption;
- replacement policy;
11.Dynamic power on/off method for 3D NoCs with wireless inductive-coupling links

机译：具有无线感应耦合链接的3D NoC的动态电源开/关方法
- 作者：Zhang Hao;Matsutani Hiroki;Koibuchi Michihiro;Amano Hideharu
- 会议名称：《IEEE Symposium on Low-Power and High-Speed Chips》 | 2013年
- Wireless NoC and On/Off link;
12.Architecture level TSV count minimization methodology for 3D tree-based FPGA

机译：基于3D树的FPGA的体系结构级TSV计数最小化方法
- 作者：Pangracious Vinod;Mehrez Habib;Marakchi Zied
- 会议名称：《IEEE Symposium on Low-Power and High-Speed Chips》 | 2013年
13.Panel discussions the next step in processor evolution

机译：小组讨论处理器发展的下一步
- 作者：Masubuchi Yoshio;Gyselinckx Bert;McCool Michael;Momose Shintaro
- 会议名称：《IEEE Symposium on Low-Power and High-Speed Chips》 | 2013年