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Design of a polysilicon-on-insulator pressure sensor with original polysilicon layout for harsh environment

机译:具有恶劣环境下的原始多晶硅布局的绝缘体上多晶硅压力传感器的设计

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For conventional architectures of polysilicon-on-insulator (PSOI) piezoresistive pressure sensors, metal-on-polysilicon contacts located on the membrane are submitted to repetitive strains and a possible deterioration may occur after a long use period. The metallisation may also be damaged at high temperature or when a corrosive atmosphere is in contact with the membrane. The basic idea developed in this paper consists in reporting the metal-on-polysilicon contacts outside the membrane. A new sensor design based on this idea is presented. The resistance of the polysilicon patterns have been modelled and optimised by finite element analysis. After thermal oxidation, a 0.46 μm thick polysilicon film has been obtained by LPCVD (620℃, 450 mtorr) then boron implanted (30 keV, 2~(15) cm(-3)). A crystallisation RTA has been performed at 1100℃ during 20 s. The silicon etching of a 20 μm thick membrane has been achieved by means of an aqueous KOH solution. A 8.3 mΩ cm resistivity value has been measured on polysilicon Hall patterns. The measured resistances have been found in a very good agreement with the simulations. The low pressure sensor has been tested in a full Wheatstone-bridge configuration showing a good linearity in the [0╚D200] mbar range with a 50 mV bar~(-1) mA~(-1) sensitivity. These results demonstrate the feasibility of a pressure sensor without metal/ polysilicon contact running over the membrane.
机译:对于绝缘体上多晶硅(PSOI)压阻式压力传感器的常规体系结构,位于膜片上的多晶硅上金属触点会受到重复应变,长时间使用后可能会发生变质。在高温或腐蚀性气氛与膜接触时,金属化也可能会损坏。本文提出的基本思想在于报告膜外部的多晶硅上金属接触。提出了基于此思想的新传感器设计。多晶硅图案的电阻已通过有限元分析建模和优化。热氧化后,通过LPCVD(620℃,450 mtorr),然后注入硼(30 keV,2〜(15)cm(-3)),获得了0.46μm厚的多晶硅膜。 RTA在1100℃下进行了20 s的结晶。已经通过KOH水溶液对20μm厚的膜进行了硅蚀刻。在多晶硅霍尔图形上测得的电阻率为8.3mΩcm。发现测得的电阻与仿真非常吻合。低压传感器已在完整的惠斯通电桥配置下进行了测试,显示在[0╚D200] mbar范围内具有良好的线性,灵敏度为50 mV bar〜(-1)mA〜(-1)。这些结果证明了没有金属/多晶硅接触在膜上运行的压力传感器的可行性。

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