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Electrical behavior of p-type PbS-based metal-oxide-semiconductor thin film transistors

机译:p型基于PbS的金属氧化物半导体薄膜晶体管的电性能

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摘要

Chemically deposited lead sulfide (PbS) thin films were used as the semiconductor active layer in common-gated thin film transistors. The PbS films were deposited at room temperature on SiO_2/Si-p wafers. Lift-off was used to define source and drain contacts (gold, Au) on top of the PbS layer with channel lengths ranging from 10 to 80 μm. The Si-p wafer with a back chromium-gold contact served as the common gate for the transistors. Experimental results show that as-deposited PbS are p-type in character and the devices exhibit typical drain current versus source-drain voltage (I_(ds)-V_(ds)) behavior as a function of gate voltage. The values of threshold voltage of the devices were in the range from -7.8 to 1.0 V, depending on the channel length. Channel mobility was approximately 10~(-4) cm~2V~(-1)s~(-1). The low channel mobility in the devices is attributed to the influence of the microstructure of the nanocrystalline thin films. The electrical performance of the PbS-based devices was improved by thermal annealing the devices in forming gas at 250 ℃. In particular, channel mobility increased and threshold voltage decreased as a consequence of the thermal annealing.
机译:化学沉积的硫化铅(PbS)薄膜被用作普通门控薄膜晶体管中的半导体有源层。在室温下将PbS膜沉积在SiO_2 / Si-p晶圆上。剥离用于定义PbS层顶部的源极和漏极触点(金,金),通道长度范围为10至80μm。具有背面铬金触点的Si-p晶片用作晶体管的公共栅极。实验结果表明,沉积的PbS的特性为p型,并且器件表现出典型的漏极电流与源极-漏极电压(I_(ds)-V_(ds))随栅极电压变化的关系。器件的阈值电压值在-7.8至1.0 V的范围内,具体取决于沟道长度。通道迁移率约为10〜(-4)cm〜2V〜(-1)s〜(-1)。器件中的低沟道迁移率归因于纳米晶体薄膜的微观结构的影响。通过在250℃形成气体时对器件进行热退火,可以改善PbS基器件的电性能。特别地,由于热退火,沟道迁移率增加并且阈值电压降低。

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  • 来源
    《Thin Solid Films》 |2010年第1期|p.512-516|共5页
  • 作者单位

    Centra de Investigation y Estudios Avanzados del IPN, Unidad Queretaro, Apdo. Postal 1-798, Queretaro, Qro., 76001, Mexico;

    Centra de Investigation y Estudios Avanzados del IPN, Unidad Queretaro, Apdo. Postal 1-798, Queretaro, Qro., 76001, Mexico;

    Centra de Investigation en Fisica, Universidad de Sonora, Apdo. Postal 5-088, CP 83000, Hermosillo, Sonora, Mexico;

    Materials Science and Engineering, The University of Texas at Dallas, Richardson 75080, TX, USA;

    Materials Science and Engineering, The University of Texas at Dallas, Richardson 75080, TX, USA,Departamento de Polimeros y Materiales, Universidad de Sonora, Apdo. Postal 130, CP 83000, Hermosillo, Sonora, Mexico;

    Centra de Investigation y Estudios Avanzados del 1PN, Unidad Queretaro, Apdo. Postal 1-798, Queretaro, Qro., 76001, Mexico;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    lead sulfide; chemical bath deposition; field effect transistors;

    机译:硫化铅化学浴沉积;场效应晶体管;

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