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Dual etch processes of via and metal paste filling for through silicon via process

机译:硅通孔工艺的通孔和金属膏填充的双重蚀刻工艺

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摘要

We investigated the etched slope control of silicon via and the filling of the through silicon via (TSV) with nano-scale Ag paste. Patterns for a 10 μm-diameter hole and line were etched using the Bosch process in a deep reactive ion etching system (the first etching process). The diameter of via(Top) and the depth of the via were about 10.6 μm and 80 μm, respectively, with a nearly vertical profile. In sequence, the tapered via and the removal of the scallops were obtained using an inductively-coupled etching system (the second etching process). We investigated the effects of gas pressure and input power on the slope of the TSV during the second etching process. In the second etching process, as the process pressure increased from 10 to 80 mTorr, the diameter of via(Top) decreased from 13 to 12.2 μm. Meanwhile, the expansion of via(Top) increased with increasing source power from 200 to 600 W. We found that the expansions of the via(Top) size were related to the desorption of by-product and the arrival of ion flux. We achieved a smooth surface and a slope angle of about 86° using the dual etch process. Finally, the depth of the 80 um via was filled with nano-scale Ag paste using a vacuum-assisted filling method.
机译:我们研究了硅通孔的蚀刻斜率控制以及纳米级银膏对硅通孔(TSV)的填充。在深反应离子刻蚀系统中,使用Bosch工艺刻蚀直径为10μm的孔和线的图案(第一个刻蚀工艺)。通孔(顶部)的直径和通孔的深度分别为约10.6μm和80μm,具有近似垂直的轮廓。依次地,使用感应耦合蚀刻系统(第二蚀刻工艺)获得锥形通孔和去除扇贝。我们研究了第二次蚀刻过程中气压和输入功率对TSV斜率的影响。在第二蚀刻工艺中,随着工艺压力从10 mTorr增加到80 mTorr,via(Top)的直径从13减小到12.2μm。同时,随着源功率从200 W增加到600 W,通孔(Top)的膨胀也增加。我们发现通孔(Top)的膨胀与副产物的解吸和离子通量的到达有关。使用双重蚀刻工艺,我们获得了光滑的表面和大约86°的倾斜角。最终,使用真空辅助填充方法将80微米通孔的深度填充了纳米级银膏。

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  • 来源
    《Thin Solid Films》 |2011年第20期|p.6727-6731|共5页
  • 作者单位

    Electronics and Telecommunications Research Institute, Daejeon, 305-350, Republic of Korea, Department of Control and Instrumentation Engineering, Korea University, Chungnam 339-700, Republic of Korea;

    Electronics and Telecommunications Research Institute, Daejeon, 305-350, Republic of Korea;

    Electronics and Telecommunications Research Institute, Daejeon, 305-350, Republic of Korea;

    Electronics and Telecommunications Research Institute, Daejeon, 305-350, Republic of Korea;

    Department of Electronics Engineering, Chungnam National University, Daejeon 305-764, Republic of Korea;

    Electronics and Telecommunications Research Institute, Daejeon, 305-350, Republic of Korea;

    Department of Control and Instrumentation Engineering, Korea University, Chungnam 339-700, Republic of Korea;

    Department of Electronics Engineering, Chungnam National University, Daejeon 305-764, Republic of Korea;

    Electronics and Telecommunications Research Institute, Daejeon, 305-350, Republic of Korea;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    tsv; etched slope; bosch process; 1cp; via filling; nano-paste;

    机译:tsv;蚀刻坡度;博世工艺;1cp;通过填充;纳米膏;

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