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首页> 外文期刊>Thin Solid Films >Comparative analysis of oxide phase formation and its effects on electrical properties of SiO_2/InSb metal-oxide-semiconductor structures
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Comparative analysis of oxide phase formation and its effects on electrical properties of SiO_2/InSb metal-oxide-semiconductor structures

机译:氧化物相形成及其对SiO_2 / InSb金属氧化物半导体结构电性能影响的比较分析

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摘要

We report on the changes in the interfacial phases between SiO_2 and InSb caused by various deposition temperatures and heat treatments. X-ray photoelectron spectroscopy (XPS) and Raman spectroscopy were used to evaluate the relative amount of each phase present at the interface. The effect of interfacial phases on the electrical properties of SiO_2/InSb metal-oxide-semiconductor (MOS) structures was investigated by capacitance-voltage (C-V) measurements. The amount of both In and Sb oxides increased with the deposition temperature. The amount of interfacial In oxide was larger for all samples, regardless of the deposition and annealing temperatures and times. In particular, the annealed samples contained less than half the amount of Sb oxide compared with the as-deposited samples, indicating a strong interfacial reaction between Sb oxide and the InSb substrate during annealing. The interface trap density sharply increased for deposition temperatures above 240 ℃. The C-V measurements and Raman spectroscopy indicated that elemental Sb accumulation due to the interfacial reaction of Sb oxide with InSb substrate was responsible for the increased interfacial trap densities in these SiO_2/InSb MOS structures.
机译:我们报告了由各种沉积温度和热处理引起的SiO_2和InSb界面相的变化。使用X射线光电子能谱(XPS)和拉曼光谱来评估界面上每个相的相对量。通过电容-电压(C-V)测量研究了界面相对SiO_2 / InSb金属氧化物半导体(MOS)结构电性能的影响。 In和Sb氧化物的含量均随沉积温度的增加而增加。不论沉积,退火温度和时间如何,所有样品的界面In氧化物量均较大。特别地,与沉积后的样品相比,退火后的样品所含的Sb氧化物的量少于一半,这表明在退火过程中Sb氧化物与InSb衬底之间的强烈界面反应。当沉积温度超过240℃时,界面陷阱密度急剧增加。 C-V测量和拉曼光谱表明,由于Sb氧化物与InSb衬底之间的界面反应而导致的元素Sb积累是这些SiO_2 / InSb MOS结构中界面陷阱密度增加的原因。

著录项

  • 来源
    《Thin Solid Films》 |2012年第16期|p.5382-5385|共4页
  • 作者单位

    Department of Materials Science and Engineering, Seoul National University, Seoul 151-744, Republic of Korea;

    Department of Materials Science and Engineering, Seoul National University, Seoul 151-744, Republic of Korea WCU Hybrid Materials Program, Department of Materials Science and Engineering, Seoul National University, Seoul 151-744, Republic of Korea;

    Department of Materials Science and Engineering, Seoul National University, Seoul 151-744, Republic of Korea;

    Department of Materials Science and Engineering, Seoul National University, Seoul 151-744, Republic of Korea;

    Department of Materials Science and Engineering, Seoul National University, Seoul 151-744, Republic of Korea;

    Department of Materials Science and Engineering, Seoul National University, Seoul 151-744, Republic of Korea;

    Department of Electronic Engineering, Hanyang University, Seoul 133-791, Republic of Korea;

    Department of Materials Science and Engineering, Seoul National University, Seoul 151-744, Republic of Korea WCU Hybrid Materials Program, Department of Materials Science and Engineering, Seoul National University, Seoul 151-744, Republic of Korea Department of Nano Science and Technology, Graduate School of Convergence Science and Technology, Seoul National University, Suwon 443-270, Republic of Korea Energy Semiconductor Research Center, Advanced Institutes of Convergence Technology, Seoul National University, Suwon 443-270, Republic of Korea;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    InSb; SiO_2; PECVD; interface; XPS;

    机译:InSb;SiO_2;PECVD;接口;XPS;

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