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首页> 外文期刊>Thin Solid Films >Ge1-xSix on Ge-based n-type metal-oxide semiconductor field-effect transistors by device simulation combined with high-order stress-piezoresistive relationships
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Ge1-xSix on Ge-based n-type metal-oxide semiconductor field-effect transistors by device simulation combined with high-order stress-piezoresistive relationships

机译:Ge1-xSix在Ge基n型金属氧化物半导体场效应晶体管上的器件仿真与高阶应力-压阻关系相结合

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The considerably high carrier mobility of Ge makes Ge-based channels a promising candidate for enhancing the performance of next-generation devices. The n-type metal-oxide semiconductor field-effect transistor (nMOSFET) is fabricated by introducing the epitaxial growth of high-quality Ge-rich Ge1-xSix alloys in source/drain (S/D) regions. However, the short channel effect is rarely considered in the performance analysis of Ge-based devices. In this study, the gate-width dependence of a 20 nm Ge-based nMOSFET on electron mobility is investigated. This investigation uses simulated fabrication procedures combined with the relationship of the interaction between stress components and piezoresistive coefficients at high-order terms. Ge1-xSix alloys, namely, Ge0.96Si0.04, Ge0.93Si0.07, and Ge0.86Si0.14, are individually tested and embedded into the S/D region of the proposed device layout and are used in the model of stress estimation. Moreover, a 1.0 GPa tensile contact etching stop layer (CESL) is induced to explore the effect of bi-axial stress on device geometry and subsequent mobility variation. Gate widths ranging from 30 nm to 4 mu m are examined. Results show a significant change in stress when the width is <300 nm. This phenomenon becomes notable when the Si in the Ge1-xSix alloy is increased. The stress contours of the Ge channel confirm the high stress components induced by the Ge0.86Si0.14 stressor within the device channel. Furthermore, the stresses (S-yy) of the channel in the transverse direction become tensile when CESL is introduced. Furthermore, when pure S/D Ge1-xSix alloys are used, a maximum mobility gain of 28.6% occurswith an similar to 70 nm gate width. A 58.4% increase in mobility gain is obtained when a 1.0 GPa CESL is loaded. However, results indicate that gate width is extended to 200 nm at this point. (C) 2015 Elsevier B.V. All rights reserved.
机译:Ge相当高的载流子迁移率使基于Ge的通道成为增强下一代设备性能的有前途的候选者。 n型金属氧化物半导体场效应晶体管(nMOSFET)是通过在源极/漏极(S / D)区域引入外延生长高质量的富含Ge的Ge1-xSix合金而制成的。但是,在基于Ge的器件的性能分析中很少考虑短通道效应。在这项研究中,研究了20 nm Ge基nMOSFET对电子迁移率的栅极宽度依赖性。这项研究使用模拟的制造程序,并结合了高阶条件下应力分量与压阻系数之间相互作用的关系。 Ge1-xSix合金,即Ge0.96Si0.04,Ge0.93Si0.07和Ge0.86Si0.14,经过单独测试,并嵌入到建议的器件布局的S / D区域中,并用于应力模型中估计。此外,诱导了1.0 GPa的拉伸接触蚀刻停止层(CESL),以探索双轴应力对器件几何形状和后续迁移率变化的影响。检查栅极宽度为30 nm至4μm。结果表明,当宽度小于300 nm时,应力会发生显着变化。当Ge1-xSix合金中的Si含量增加时,这种现象变得尤为明显。 Ge通道的应力轮廓确定了器件通道内的Ge0.86Si0.14应力源引起的高应力分量。此外,当引入CESL时,通道在横向方向上的应力(S-yy)变得张拉。此外,当使用纯S / D Ge1-xSix合金时,在接近70 nm栅极宽度的情况下会出现28.6%的最大迁移率增益。加载1.0 GPa CESL时,迁移率增益提高58.4%。但是,结果表明,此时的栅极宽度已扩展到200 nm。 (C)2015 Elsevier B.V.保留所有权利。

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