Parallel test techniques reduce test costs

摘要

The 1999 SIA roadmap predicted a transistor's cost-of-test (COT) would exceed its fabrication cost by 2012. COT reduction strategies include testing less, more efficiently, and differently, as well as reducing the cost of the testers used Applying a typical cost-of-ownership model to parametric test in volume production, then performing sensitivity analysis, reveals that while cutting initial capital equipment cost by 50% decreases COT/wafer by 15%, a 50% test time reduction delivers a COT/wafer decrease of nearly 50%. Testing more efficiently is clearly the more effective strategy for reducing parametric COT.