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Late-porogen removal integration for ultra-low-k{sub}(eff) IMDs

机译:超低k {sub}(eff)IMD的后期成孔剂去除集成

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摘要

The value k{sub}(eff) has become a valuable metric for evaluating the quality of the final integrated intermetal dielectric (IMD) film stack. Achieving the ITRS projection of 2.5 k{sub}(eff) for interconnect dielectric by the end of the decade may require the integration of highly porous, ultra-low-k films. Moreover, integration must occur with minimal process-induced dielectric damage. To this end, a SEMATECH dual-damascene integration approach has been developed that entails stopless integration and a post-CMP, or "late," porogen-removal process. Low-damage CMP, etch, ash, and dielectric-cure processes were integrated to demonstrate an intraline k{sub}(eff) of 2.5. In addition, preliminary results show that a new spin-on dielectric with relatively higher-temperature stability can be integrated with a PECVD hard-mask for enhanced reliability, though with slightly higher integrated k{sub}(eff).
机译:值k {sub}(eff)已成为评估最终集成金属间电介质(IMD)薄膜叠层质量的重要指标。到本世纪末,要实现互连电介质的2.5 k {sub}(eff)的ITRS预测,可能需要集成高度多孔的超低k膜。而且,集成必须以最小的过程引起的介电损坏发生。为此,已经开发了一种SEMATECH双大马士革集成方法,该方法需要不间断的集成和CMP后或“后期”的致孔剂去除过程。集成了低损伤CMP,蚀刻,灰化和介电固化工艺,以证明线内k {sub}(eff)为2.5。此外,初步结果表明,具有较高温度稳定性的新型旋涂电介质可与PECVD硬掩模集成,以提高可靠性,尽管集成k {sub}(eff)略高。

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