Separating Crystal Defects from Particles

摘要

At the 45nm node, building a high performance device with optimum power consumption requires a substrate with the highest quality surface topography and electronic structure. Defects intrinsic to the substrate crystal, such as faceted pits in prime wafers, voids in SOI wafers, and stacking faults in epi wafers, are particularly damaging to the transistors built on top of them. A new unpatterned wafer inspection system that has the ability to distinguish crystallographic defects from surface defects such as particles, flakes and other fall-ons, has been introduced. The ability to discern wafers that are free of intrinsic defects, allows fewer wafers to be scrapped at wafer production. This new technology provides a solid foundation for the manufacture of high speed, low power, low cost 45nm devices.