Steady Progress Reported On Hk+mg For 32nm And Beyond

摘要

Chipmakers are trying many paths toward high-k metal gate dielectric (HK+MG) CMOS for 32nm and beyond. An assortment of papers at IEDM 2008 in San Francisco, CA, showed steadily improving results even though the routes may vary. Using high-k with metal gates not only enables a return to some scaling, but as Intel's Mistry et al. showed at IEDM 2007, gate leakage also can be reduced 25x for nMOS and 1000× for pMOS. But getting to uniform manufacturable devices presents some tough challenges.