Analysis of TSV proximity effects in planar MOSFETs and FinFETs

摘要

Over the last several years, the semiconductor industry has made significant strides in demonstrating the technical feasibility of 3D-IC integration in several different configurations, each with its own challenges and potential benefits. For example, memory cubes comprised of stacks of NAND FLASH or DRAM memory die, connected internally with through-silicon vias (TSVs), have already been manufactured by several companies. Memory cubes reduce the form factor of the memory product and improve performance because of shorter electrical interconnections. In another configuration, silicon interposer technology, also known as 2.5D-IC, mitigates a number of challenges that arise in die-stacked 3D-IC, while offering the advantage of shorter inter-die connections relative to traditional 2D packaging.