Characterization of ultralow voltage, fully depleted silicon on insulator CMOS device and circuit technology

摘要

We present the design, fabrication and characterization of fully depleted silicon on insulator (FDSOI) CMOS devices and circuits for ultralow voltage operation. We have obtained symmetrical threshold voltages for N and P channel devices with an ON-OFF current ratio of 1000:1. A figure of merit of 5 fJ/stage is achieved at 0.25 V on 0.25 μm, 2-input NAND gate FDSOI CMOS ring oscillators. Polysilicon gate depletion and source-drain series resistance limit the performance of the FDSOI CMOS technology. A simplified model combined with high frequency capacitance- voltage measurements at two different frequencies is developed to determine the series resistance and polysilicon gate depletion effects.