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Reduction in threshold voltage fluctuation in fully-depleted SOI MOSFETs with back gate control

机译:通过背栅控制减少完全耗尽的SOI MOSFET的阈值电压波动

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This paper presents the effects of the back gate control on the threshold voltage fluctuation in fully-depleted SOI MOSFETs. Particularly, we mainly examine the threshold voltage fluctuation due to the variations of the SOI thickness. It is found that the absence of threshold voltage fluctuation due to the SOI thickness variation can be achieved by appropriately choosing given values of back gate voltage and channel impurity concentration, This is because the back gate bias and the channel impurity concentration have SOI thickness dependence opposite to that of the threshold voltage. On the other hand, short channel effects are another factor affecting the threshold voltage fluctuation due to the SOI thickness variation in the case of short gate length. It is shown that application of the back gate bias is a better way to suppress short channel effects than the increase in the channel doping under a constant value of threshold voltage. It is found that the suppression of the threshold voltage fluctuation by applying the back gate bias is still maintained down to gate length of 50 nm.
机译:本文介绍了背栅控制对完全耗尽SOI MOSFET中阈值电压波动的影响。特别是,我们主要研究由于SOI厚度的变化引起的阈值电压波动。发现通过适当选择背栅电压和沟道杂质浓度的给定值可以实现没有由于SOI厚度变化引起的阈值电压波动,这是因为背栅偏压和沟道杂质浓度具有相反的SOI厚度依赖性。到阈值电压。另一方面,在栅极长度短的情况下,由于SOI厚度变化,短沟道效应是另一个影响阈值电压波动的因素。结果表明,与在恒定阈值电压下增加沟道掺杂相比,施加背栅偏置是抑制短沟道效应的更好方法。已经发现,通过施加背栅偏压来抑制阈值电压波动仍然保持低至栅极长度为50nm。

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