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On the great potential of non-doped MOSFETs for analog applications in partially-depleted SOI CMOS process

机译:论非掺杂MOSFET在部分耗尽SOI CMOS工艺中用于模拟应用的巨大潜力

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摘要

In this paper we discuss the potential applicability of SOI MOS transistors with non-doped (or intrinsic) channels for analog applications. We present the comparison of doped and intrinsic nMOSFETs in terms of parameters of the importance for analog designers and demonstrate that intrinsic devices are very prom ising for low-voltage, low-power analog applications, as they feature better threshold voltage control and predictability, higher maximum transconductance, driving current and attenuation of floating-body effects. We show that the use of non-doped devices gives the opportunity to create fully-depleted (FD) devices within a partially-depleted (PD) process. A new effect occurring in such intrinsic devices, which we call "PD-to-FD jump", is described for the first time.
机译:在本文中,我们讨论了具有非掺杂(或本征)沟道的SOI MOS晶体管在模拟应用中的潜在适用性。我们通过对模拟设计人员重要的参数对掺杂的和本征型nMOSFET进行了比较,并证明了本征器件对于低压,低功耗模拟应用非常重要,因为它们具有更好的阈值电压控制和可预测性,最大跨导,驱动电流和浮体效应衰减。我们表明,使用非掺杂器件可以在部分耗尽(PD)的过程中创建完全耗尽(FD)的器件。首次描述了在这种固有设备中发生的新效应,我们称之为“ PD至FD跳跃”。

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