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Dependence of low frequency noise in SiGe heterojunction bipolar transistors on the dimensional and structural features of extrinsic regions

机译:SiGe异质结双极晶体管中的低频噪声对非本征区的尺寸和结构特征的依赖性

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摘要

In this paper, the effects of different transistor design aspects on the noise behavior of SiGe heterojunction bipolar transistors have been investigated. Selectively implanted collector, although retards the base push-out, does not deteriorate the noise characteristics. Moreover, a higher dopant implant in the extrinsic base region intended for a smaller base resistance does not deteriorate the noise characteristics. While the interface between the SiGe epitaxial and polycrystalline layers does not have any detrimental impact, the emitter-poly overlap significantly influences both the DC and the noise characteristics. Smaller emitter-poly overlap results in an increased non-ideal base current at lower bias voltages and produces appreciable generation-recombination noise. For all the transistors, except for the ones with smaller emitter-poly overlap, the base current noise power spectral density shows a near quadratic dependence on the base current, where the noise is believed to originate mostly from the superposition of the generation-recombination noise in the intrinsic emitter-base junction. The base current noise power spectral density for the transistors with a smaller emitter-poly overlap shows a near linear dependence on the base current, which results from an increased contribution from the trap-assisted tunneling fluctuations of the minority carriers at the surface of the emitter-base junction.
机译:本文研究了不同晶体管设计方面对SiGe异质结双极晶体管的噪声行为的影响。选择性注入的集电极虽然会延迟基极的推出,但不会降低噪声特性。此外,在用于较小的基极电阻的非本征基极区中较高的掺杂剂注入不会使噪声特性恶化。尽管SiGe外延层和多晶层之间的界面没有任何有害影响,但发射极与多晶硅的重叠会显着影响DC和噪声特性。较小的发射极-多晶硅重叠导致在较低偏置电压下增加的非理想基极电流,并产生可观的发电复合噪声。对于所有晶体管,除了发射极-多晶硅重叠较小的那些晶体管之外,基极电流噪声功率谱密度显示出对基极电流的几乎二次依赖性,据信该噪声主要来自世代复合噪声的叠加在本征发射极-基极结中。具有较小发射极-多晶硅重叠的晶体管的基极电流噪声功率谱密度显示出对基极电流的线性依赖性,这是由于发射极表面少数载流子的陷阱辅助隧穿涨落贡献的增加所致-基结。

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