Determination of gate-bias dependent source/drain series resistance and effective channel length for advanced MOS devices

摘要

In this paper, an improved method for determining the gate-bias dependent source and drain series resistances R_D and effective channel length L_(eff) = L_M - ΔL (L_M is the mask channel length and ΔL is the channel length reduction) of advanced MOS devices is developed for the purpose of providing a better accuracy for the modeling of the current-voltage characteristics of LDD MOSFETs operating from 25 to 120℃. Our results show that both ΔL and R_(SD) decrease with increasing gate-bias, but increase with increasing temperature. In addition, the gate-bias dependence of ΔL and R_(SD) becomes weaker as the temperature rises. Experimental data obtained from devices fabricated using the 0.14 and 0.09 μm DRAM technologies are included in support of the theoretical work developed.