Design guideline for high-speed InP/InGaAs SHBT using a practical scaling law

摘要

For many years, HBTs have been vertically and laterally scaled down to improve high-frequency performance. For the very small devices of recent process, some parameters cannot be scaled down properly and an alternative scaling-law is required. In this paper, we describe the optimization issues for high-speed InP/InGaAs SHBTs and offer a design guideline to accommodate the scaling limit. From a 0.25 μm SHBT designed by the scaling law, the maximum extrapolated f_(max) of about 687 GHz with f_T of 215 GHz can be achieved. We also investigate the effect of key geometrical parameters such as emitter geometry and base/collector layer thicknesses on the device RF performance.