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A new analytical threshold voltage model for symmetrical double-gate MOSFETs with high-k gate dielectrics

机译:具有高k栅极电介质的对称双栅极MOSFET的新分析阈值电压模型

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Based on the fully two-dimensional (2D) Poisson's solution in both silicon film and insulator layer, a compact and analytical threshold voltage model, which accounts for the fringing field effect of the short channel symmetrical double-gate (SDG) MOSFETs, has been developed. Exploiting the new model, a concerned analysis combining FIBL-enhanced short-channel effects and high-k gate dielectrics assess their overall impact on SDG MOSFET's scaling. It is found that for the same equivalent oxide thickness, the gate insulator with high-k dielectric constant which keeps a great characteristic length allows less design space than SiO_2 to sustain the same FIBL induced threshold voltage degradation.
机译:基于硅膜和绝缘体层中的全二维(2D)泊松解决方案,一种紧凑且分析性的阈值电压模型已经解决,该模型考虑了短沟道对称双栅(SDG)MOSFET的边缘场效应。发达。利用新模型,将FIBL增强的短沟道效应与高k栅极电介质相结合的相关分析评估了它们对SDG MOSFET规模的总体影响。发现对于相同的等效氧化物厚度,具有高k介电常数且保持较大特征长度的栅绝缘子,与SiO_2相比,其设计空间较小,可以维持相同的FIBL引起的阈值电压降级。

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