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首页> 外文期刊>Solid-State Electronics >Structural and electrical properties of metal-ferroelectric-insulator-semiconductor transistors using a Pt/Bi_(3.25)Nd_(0.75)Ti_3O_(12)/Y_2O_3/Si structure
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Structural and electrical properties of metal-ferroelectric-insulator-semiconductor transistors using a Pt/Bi_(3.25)Nd_(0.75)Ti_3O_(12)/Y_2O_3/Si structure

机译:使用Pt / Bi_(3.25)Nd_(0.75)Ti_3O_(12)/ Y_2O_3 / Si结构的金属铁电绝缘体半导体晶体管的结构和电性能

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The metal-ferroelectric-insulator-semiconductor (MFIS) capacitors were fabricated using the Pt/Bi_(3.25)Nd_(0.75)Ti_3O_(12)/Y_2O_3/Si(100) structure, yttrium sesquioxide (Y_2O_3) thin films as an insulating buffer layer with different thickness ranging from 10 to 40 nm were deposited on p-type Si(100) at room temperature by electron-beam evaporation method. Nd-modified bismuth titanate (Bi_(3.25)Nd_(0.75)-Ti_3O_(12):BNT) films were prepared as ferroelectric layers at a processing temperature of 750℃ by chemical solution deposition (CSD) method. The Y_2O_3 buffer layers show an amorphous structure, relatively high dielectric constant, and good electrical properties. The ferroelectric polarization-voltage (P-V) hysteresis was observed for Pt/BNT/Pt/Ti/SiO_2/Si and Pt/BNT/Y_2O_3/Si(100) capacitors. The MFIS structure exhibits a larger clockwise C-V memory window of 2.63 V when the thickness of Y_2O_3 layer was 10 nm and a lower leakage current density of 7 x 10~(-9) A/cm~2 at a positive applied voltage of 6 V. Capacitance-voltage (C-V) and leakage-current density (J-V) characteristics of Pt/BNT/Y_2O_3/Si(100) capacitor indicate that the introduction of the Y_2O_3 buffer layer prevents the interfacial diffusion between BNT thin film and the Si substrate effectively and improves the interface quality. Furthermore, the Pt/BNT/Y_2O_3/Si structures exhibit excellent retention characteristics, the high and low capacitance values biased in the hysteresis loop are clearly distinguishable for over 13.6 days. The experimental results show that the BNT-based MFIS structure is suitable for non-volatile ferroelectric memory field-effect-transistors (FETs) with large memory window.
机译:使用Pt / Bi_(3.25)Nd_(0.75)Ti_3O_(12)/ Y_2O_3 / Si(100)结构,倍半氧化钇(Y_2O_3)薄膜作为绝缘缓冲层来制造金属铁电绝缘体(MFIS)电容器通过电子束蒸发法在室温下在p型Si(100)上沉积厚度范围为10至40 nm的硅层。通过化学溶液沉积(CSD)法在750℃的处理温度下制备了Nd-改性钛酸铋(Bi_(3.25)Nd_(0.75)-Ti_3O_(12):BNT)薄膜作为铁电层。 Y_2O_3缓冲层显示出非晶结构,相对高的介电常数和良好的电性能。观察到Pt / BNT / Pt / Ti / SiO_2 / Si和Pt / BNT / Y_2O_3 / Si(100)电容器的铁电极化电压(P-V)磁滞。当Y_2O_3层的厚度为10 nm时,MFIS结构的顺时针CV存储器窗口更大,为2.63 V,在正向施加电压6 V时,泄漏电流密度较低,为7 x 10〜(-9)A / cm〜2 。Pt / BNT / Y_2O_3 / Si(100)电容器的电容电压(CV)和泄漏电流密度(JV)特性表明,引入Y_2O_3缓冲层可有效防止BNT薄膜与Si衬底之间的界面扩散并提高了界面质量。此外,Pt / BNT / Y_2O_3 / Si结构具有出色的保持特性,在滞后回线中偏置的高电容值和低电容值在超过13.6天的时间里都清晰可见。实验结果表明,基于BNT的MFIS结构适用于具有大存储窗口的非易失性铁电存储场效应晶体管(FET)。

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