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Localised defect-induced Schottky barrier lowering in n-GaN Schottky diodes

机译:n-GaN肖特基二极管中局部缺陷引起的肖特基势垒降低

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摘要

The forward bias current-voltage (I-V) characteristics of n-GaN Schottky diodes on sapphire substrate were investigated over a wide temperature range of 70-500 K. For models based on localised regions of lowered Schottky barrier height, a distributed barrier height should be expected when these localised regions are comparable to or smaller in size than the depletion width. However, a suitable fit for the I-V curves, which exhibited anomalous two-step (kink) forward bias behaviour, was only obtained when modelling the leakier regions with a single reduced barrier height, by using a model of two discrete diodes in parallel.
机译:在70-500 K的宽温度范围内,研究了蓝宝石衬底上n-GaN肖特基二极管的正向偏置电流-电压(IV)特性。对于基于降低的肖特基势垒高度的局部区域的模型,应将分布势垒高度设为这些局部区域的大小与耗尽宽度相当或更小时,可以预期到。但是,只有通过使用两个并联的分立二极管的模型来建模具有单个减小的势垒高度的泄漏区域时,才能获得表现出异常的两步(扭折)正向偏置行为的I-V曲线的合适拟合。

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