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Method of extracting effective channel length for nano-scale n-MOSFETs

机译:提取纳米级n-MOSFET的有效沟道长度的方法

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摘要

This paper proposes a method of extracting the effective channel length L_(eff) of nano-scale n-MOSFETs. This method requires only one MOSFET; therefore, the L_(eff) extraction is not affected either by variation of carrier mobility due to differences in gate length or by changes in MOSFET parameters due to differences in fabrication processes. The method is based on the facts that the gate tunneling current I_(gb) to the substrate depends on L_(eff), and that the gate tunneling current I_(gsd) to the source and drain depends on the gate-source/drain overlap length ΔL. Curves of I_(gb) and I_(gsd) versus the gate dielectric voltage V_(ox) were obtained from the measured curves of I_(gb) and I_(gsd) versus gate voltage V_g in n-MOSFETs fabricated using a 90 nm CMOS technology. L_(eff) was extracted from the ratio I_(gb)/I_(gsd) for a given V_(ox). Comparison of the drain current I_d versus V_d curves calculated using the extracted L_(eff)S with the same curves obtained using previous methods shows that the proposed method is much more accurate than the previous ones.
机译:本文提出了一种提取纳米级n-MOSFET的有效沟道长度L_(eff)的方法。这种方法只需要一个MOSFET;因此,L_(eff)提取不受栅极长度不同引起的载流子迁移率变化或制造工艺不同引起的MOSFET参数变化的影响。该方法基于以下事实:到衬底的栅极隧穿电流I_(gb)取决于L_(eff),并且到源极和漏极的栅极隧穿电流I_(gsd)取决于栅极-源极/漏极重叠长度ΔL。从使用90 nm CMOS制造的n-MOSFET中I_(gb)和I_(gsd)与栅极电压V_g的测量曲线获得I_(gb)和I_(gsd)与栅极介电电压V_(ox)的曲线技术。对于给定的V_(ox),从比率I_(gb)/ I_(gsd)中提取L_(eff)。使用提取的L_(eff)S计算出的漏极电流I_d与V_d曲线与使用先前方法获得的相同曲线进行比较表明,所提出的方法比以前的方法准确得多。

著录项

  • 来源
    《Solid-State Electronics》 |2009年第10期|1076-1085|共10页
  • 作者单位

    Department of Electrical Engineering, Pohang University of Science and Technology, San 31, Hyoja-Dong, Pohang, Kyungpook 790-784, Republic of Korea;

    Department of Electrical Engineering, Pohang University of Science and Technology, San 31, Hyoja-Dong, Pohang, Kyungpook 790-784, Republic of Korea;

    Department of Electrical Engineering, Pohang University of Science and Technology, San 31, Hyoja-Dong, Pohang, Kyungpook 790-784, Republic of Korea System LSI Division, Device Solution Network, Samsung Electronics Co., Ltd. San 24, Nongseo-Ri, Giheung-Eup, Yongin-City, Gyeonggi-Do 449-711, Republic of Korea;

    Department of Electrical Engineering, Pohang University of Science and Technology, San 31, Hyoja-Dong, Pohang, Kyungpook 790-784, Republic of Korea;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《生物学医学文摘》(MEDLINE);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    MOSFET; effective channel length; Nano-scale MOSFET; gate leakage current; gate tunneling current;

    机译:MOSFET;有效通道长度;纳米级MOSFET;栅极漏电流;栅极隧穿电流;
  • 入库时间 2022-08-18 01:35:04

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