机译:薄盒硅(SOTB)CMOS芯片,具有超低待机功耗和正向偏置性能增强器
Central Research Laboratories, Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji-shi, Tokyo 185-8601, Japan;
Central Research Laboratories, Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji-shi, Tokyo 185-8601, Japan;
Central Research Laboratories, Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji-shi, Tokyo 185-8601, Japan;
Central Research Laboratories, Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji-shi, Tokyo 185-8601, Japan;
Central Research Laboratories, Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji-shi, Tokyo 185-8601, Japan;
Renesas Technology, 4-1 Mizuhara, Itami-shi, Hyogo 664-0005, Japan;
Renesas Technology, 4-1 Mizuhara, Itami-shi, Hyogo 664-0005, Japan;
Renesas Technology, 4-1 Mizuhara, Itami-shi, Hyogo 664-0005, Japan;
Institute of Industrial Science, Univ. of Tokyo, 4-6-1 Komaba, Meguro-ku, Tokyo 153-8505, Japan;
Institute of Industrial Science, Univ. of Tokyo, 4-6-1 Komaba, Meguro-ku, Tokyo 153-8505, Japan;
Central Research Laboratories, Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji-shi, Tokyo 185-8601, Japan;
complementary metal-oxide-semiconductor (CMOS); fully depleted silicon-on-insulator (FD-SOI); gate-induced drain leakage (GIDL); leakage; variation; back-gate;
机译:器件结构和反向偏置对薄框硅(SOTB)CMOSFET中HCI和NBTI的影响
机译:具有很小随机掺杂波动的薄盒硅(SOTB)CMOS中的局部可变性和可伸缩性
机译:低功耗高性能32位RISC-V微控制器上65-NM硅式薄盒(SOTB)
机译:薄框硅(SOTB)CMOS芯片具有超低待机功耗和正向偏置性能
机译:纳米级CMOS电路中降低待机泄漏功率的方法。
机译:用于无线供电的神经接口系统的薄膜柔性天线和硅CMOS整流器芯片的协同设计方法和晶圆级封装技术
机译:UltraLow-Power LSI技术用硅薄层覆盖氧化物(SOTB)CMOSFET
机译:多阈值互补金属氧化物半导体(mTCmOs)总线电路和通过脉冲待机开关降低总线功耗的方法。