机译:轻掺杂肖特基势垒双栅MOSFET的静电势的二维分析计算
University of Applied Sciences Ciessen-Friedberg. Department of Communication and Information, Wiesenstrasse 14, Ciessen 35390, Germany Universitat Roviro i Virgili, Deportment d'Enginyeria Electronka, Eiectrica i Automatka, Avda. Paiesos Catalans, 26., Campus Sescelades, Tarragona 43007, Spain;
rnUniversity of Applied Sciences Ciessen-Friedberg. Department of Communication and Information, Wiesenstrasse 14, Ciessen 35390, Germany;
rnUniversity of Applied Sciences Ciessen-Friedberg. Department of Communication and Information, Wiesenstrasse 14, Ciessen 35390, Germany;
rnUniversitat Roviro i Virgili, Deportment d'Enginyeria Electronka, Eiectrica i Automatka, Avda. Paiesos Catalans, 26., Campus Sescelades, Tarragona 43007, Spain;
2D poisson; analytical closed-form; conformal mapping; compact modeling; device modeling; double-Gate (DG) MOSFET; schottky barrier; electrostatic potential;
机译:轻掺杂肖特基势垒双栅金属氧化物场的二维分析计算和隧穿/热电子电流的估计
机译:轻掺杂双栅极MOSFET中2D静电的分析紧凑建模框架
机译:二维模型对轻掺杂对称双栅MOSFET的短沟道静电的量子效应
机译:使用完全分析模型对轻掺杂肖特基势垒DG-MOSFET中的源极/漏极载流子隧穿进行二维分析
机译:肖特基势垒MOSFET中的电传输。
机译:更正:使用解析肖特基势垒MOSFET模型分析黑磷晶体管
机译:具有低有效肖特基势垒的高性能肖特基势垒SOI-MOSFET的建模和制造