Analytical unified threshold voltage model of short-channel FinFETs and implementation

摘要

In this work, an analytical compact model for the threshold voltage Vt of double-gate (DG) and tri-gate (TG) FinFETs is proposed. The DG FinFET V, model is extended to TG FinFET V, model using effective parameters capturing the electrostatic control of the top gate over the short-channel effects. The results of the model are compared with the results of a numerical device simulator for a wide range of the channel length, the fin height and the fin width. The overall results reveal the very good accuracy of the proposed model. The Vt model has been validated by developing a Verilog-A code and comparing the results derived by the Spectre simulator and the Verilog-A code with simulation results.