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Ge_(1_x)Sn_x stressors for strained-Ge CMOS

机译:用于应变Ge CMOS的Ge_(1_x)Sn_x应力源

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摘要

In this paper, we propose the fabrication of whole strained Ge complementary metal-oxide-semiconductor (CMOS) with Ge_(1-x)Sn_x materials as stressors to outperform the state-of-the-art uniaxial compressive strained Si CMOS. Ge_(1-x)Sn_x materials have larger lattice constant than that of Ge, which can apply the strain into Ge channel region. Firstly, we have demonstrated p-type doped Ge_(1-x)Sn_x growth by using either B implantation or in situ Ga doping technique. In the B-implanted Ge_(1-x)Sn_x, formation case, fully strained B-doped Ge_(1-x)Sn_x layers with no Sn precipitation can be obtained even after solid phase epitaxial regrowth (SPER). However, the serious dislocation generation in the layer was occurred during SPER. This is caused by the point defects introduced by B implantation. In order to avoid this crystal damage, we have also demonstrated in situ Ga-doped Ge_(1-x)Sn_x growth. In this case, we can achieve fully strained Ga-doped Ge_(1-x)Sn_x growth without Sn precipitation and any defect generation. Secondary, we have demonstrated the formation of Ni(Ge_(1-x)Sn_x) layers for metal/semiconductor contact and investigated the crystalline qualities. The formation of polycrystalline Ni(Ge_(1.y)Sn_y) layers on Ge_(1-x)Sn_x layers with Sn contents ranging from 2.0% to 6.5% after annealing at from 350 °C to 550 °C can be achieved. Additionally, in the case of the Ni/Ge_(1-x)Sn_x/Ge sample with a Sn content of 3.5%, an epitaxial Ni_2(Ge_(1-y)Sn_y) layer on a Ge_(1-x)Sn_x layer was formed. However, the surface roughness due to the agglomeration of Ni(Ge_(1-x)Sn_x) increases with increasing the Sn content and the annealing temperature. Therefore, a low thermal budget must be required for the formation of Ni(Ge, _xSnx) with high Sn content. 【Keywords】Strained Ge pMOSFET;GeSn materials;Source/drain engineering;GeSn thermal budget;
机译:在本文中,我们提出了以Ge_(1-x)Sn_x材料为应力源的全应变Ge互补金属氧化物半导体(CMOS)的制造,以胜过最新的单轴压缩应变Si CMOS。 Ge_(1-x)Sn_x材料具有比Ge大的晶格常数,可以将应变施加到Ge沟道区域。首先,我们通过使用B注入或原位Ga掺杂技术证明了p型掺杂Ge_(1-x)Sn_x的生长。在B注入的Ge_(1-x)Sn_x的形成情况下,即使在固相外延再生(SPER)之后,也可以获得没有Sn沉淀的完全应变的B掺杂的Ge_(1-x)Sn_x层。但是,在SPER过程中发生了严重的位错生成。这是由B注入引入的点缺陷引起的。为了避免这种晶体损伤,我们还证明了原位掺杂Ga的Ge_(1-x)Sn_x的生长。在这种情况下,我们可以实现完全应变的掺杂Ga的Ge_(1-x)Sn_x的生长,而没有Sn沉淀和任何缺陷的产生。其次,我们已经证明了用于金属/半导体接触的Ni(Ge_(1-x)Sn_x)层的形成并研究了晶体质量。在350°C至550°C退火后,可以在Sn含量为2.0%至6.5%的Ge_(1-x)Sn_x层上形成多晶Ni(Ge_(1.y)Sn_y)层。另外,在Sn含量为3.5%的Ni / Ge_(1-x)Sn_x / Ge样品的情况下,Ge_(1-x)Sn_x层上的外延Ni_2(Ge_(1-y)Sn_y)层成立了。然而,由于Ni(Ge_(1-x)Sn_x)的团聚引起的表面粗糙度随着Sn含量和退火温度的增加而增加。因此,对于形成具有高Sn含量的Ni(Ge,_xSnx),必须要求较低的热预算。 【关键词】应变Ge pMOSFET; GeSn材料;源/漏工程; GeSn热收支;

著录项

  • 来源
    《Solid-State Electronics》 |2011年第1期|p.53-57|共5页
  • 作者单位

    Graduate School of Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya 464-8603, Japan;

    Graduate School of Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya 464-8603, Japan,Japan Society for the Promotion of Science, Japan;

    Graduate School of Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya 464-8603, Japan;

    Imec, Kapeldreef 75, 3001 Leuven, Belgium;

    Imec, Kapeldreef 75, 3001 Leuven, Belgium, ESAT-INSYS, Katholieke Universiteit Leuven, 3001 Leuven, Belgium for Scientific Research - Flanders (FWO), 100 Brussels, Belgium;

    Imec, Kapeldreef 75, 3001 Leuven, Belgium;

    Instituut voor Kern-en Stralingsfysica, KU Leuven, Leuven, Belgium;

    Instituut voor Kern-en Stralingsfysica, KU Leuven, Leuven, Belgium;

    Imec, Kapeldreef 75, 3001 Leuven, Belgium;

    Imec, Kapeldreef 75, 3001 Leuven, Belgium;

    Imec, Kapeldreef 75, 3001 Leuven, Belgium;

    Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama-cho, Toyonaka, Osaka 560-8531, Japan;

    Graduate School of Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya 464-8603, Japan;

    Graduate School of Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya 464-8603, Japan;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《生物学医学文摘》(MEDLINE);
  • 原文格式 PDF
  • 正文语种 eng
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