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机译:28 nm体NMOSFET中漏极电流从线性到饱和区域的局部变化
INPG Minatec, IMEP LAHC, CS 50257, 3 Parvis Louis Neel, F-38016 Grenoble, France|Aristotle Univ Thessaloniki, Dept Phys, Thessaloniki 54124, Greece;
INPG Minatec, IMEP LAHC, CS 50257, 3 Parvis Louis Neel, F-38016 Grenoble, France;
STMicroelectronics, BP16, F-38921 Crolles, France;
Aristotle Univ Thessaloniki, Dept Phys, Thessaloniki 54124, Greece;
INPG Minatec, IMEP LAHC, CS 50257, 3 Parvis Louis Neel, F-38016 Grenoble, France;
Mismatch; Local variability; Threshold voltage; Gain factor; Source-drain series resistance; Modeling; 28 nm bulk; CMOS;
机译:28和14 nm FDSOI nMOSFET中漏极电流局部变化的表征和建模
机译:Gigarad-TID引起的28nm体MOSFET漏极漏电流的表征和建模
机译:带和不带口袋注入的45 nm体N-MOSFET的漏极电流可变性
机译:在28nm散装NMOSFET中排出从线性到饱和区的电流局部可变性
机译:存在高κ栅极绝缘体的块状Si NMOSFET中的电子传输:电荷俘获和迁移率
机译:更正:改善石墨烯-硅-场效应晶体管的漏极电流饱和度和电压增益
机译:用于计算纳米级nmOsFET中漏极电流的先进传输模型的比较
机译:等离子体射流中局部热流密度和局部离子饱和电流密度的测量。