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首页> 外文期刊>Solid-State Electronics >The separation of generation lifetimes of Si and SiGe using capacitance-transient measurements on MOS capacitors formed by plasma anodisation of Si:Si_0.9Ge_0.1:Si substrates
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The separation of generation lifetimes of Si and SiGe using capacitance-transient measurements on MOS capacitors formed by plasma anodisation of Si:Si_0.9Ge_0.1:Si substrates

机译:在通过Si:Si_0.9Ge_0.1:Si衬底的等离子阳极氧化形成的MOS电容器上使用电容瞬态测量来分离Si和SiGe的产生寿命

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摘要

A simple technique leading to the measurement of minority carrier lifetimes of UHV compatible LPCVD Si and SiGe by C-t depth profiling of Metal:Oxide:SiSiGe:Si structures is reported. A high quality gate oxide is realised by low temperature (<100degC) plasma anodisation thereby reducing any oxidation effects on the underlying epitaxial layer quality. Capacitance response times were observed for an impurity concentration of ~2.5 x 10~17 cm~-3, giving rise to generation lifetimes of the Si and Si_0.9Ge_0.1 of >0.55 and 2.6μs respectively, reflective of very high quality epitaxial semiconductor material.
机译:报道了一种通过对金属:氧化物:SiSiGe:Si结构进行C-t深度剖析来测量UHV兼容LPCVD Si和SiGe的少数载流子寿命的简单技术。通过低温(<100degC)等离子体阳极氧化可实现高质量的栅氧化层,从而减少对底层外延层质量的任何氧化作用。在〜2.5 x 10〜17 cm〜-3的杂质浓度下,观察到电容响应时间,从而使Si和Si_0.9Ge_0.1的产生寿命分别> 0.55和2.6μs,反映出非常高质量的外延半导体材料。

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