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Analytic modeling of breakdown voltage shift in the CMOS buried multiple junction detector

机译:CMOS埋入式多结检测器中击穿电压偏移的解析模型

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摘要

We propose an analytical model for the CMOS Buried Multiple Junction (BMJ) detector exhibiting breakdown voltage shift depending on adjacent junction's bias. The device's singular behavior has been observed when two adjacent junctions are in reach-through (RT) condition. The breakdown current has been identified to be predominated by thermionic emission. The proposed model determines, for a given BMJ structure with uniform or Gaussian doping distributions under bias conditions, whether two adjacent junctions are in RT condition. In this case, it calculates the merged depletion limits, electric field and electrostatic potential profile. The potential barrier height of each merged depletion region can then be extracted and the thermionic current be computed.Model computations have been compared with TCAD simulations and measurements on the BMJ detector. Good agreements have been observed for different structures in different bias conditions at different temperatures.
机译:我们提出了一种针对CMOS埋入式多结(BMJ)检测器的分析模型,该检测器根据相邻结的偏置表现出击穿电压偏移。当两个相邻结处于直通(RT)状态时,已经观察到该器件的奇异行为。已经确定击穿电流主要由热电子发射引起。对于给定的,在偏置条件下具有均匀或高斯掺杂分布的BMJ结构,提出的模型确定两个相邻结是否处于RT条件。在这种情况下,它将计算出合并的耗尽极限,电场和静电势分布。然后可以提取每个合并的耗尽区的势垒高度,并计算热电子电流。模型计算已与TCAD仿真进行了比较,并在BMJ检测器上进行了测量。在不同的偏压条件和不同的温度下,对于不同的结构已观察到良好的一致性。

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