Numerical study on the suppression of 4H-SiC PiN diodes forward bias degradation due to substrate basal plane dislocations

摘要

We propose a calculation model of current density that causes forward bias degradation from substrate basal plane dislocations (BPDs) in 4H-SiC PiN diodes. The hole concentration above which substrate BPDs expand to single Shockley stacking faults (1SSFs) at the buffer/substrate interface was experimentally evaluated from forward-current stress tests of 4H-SiC PiN diodes by comparison with our model results, resulting in 8.0 x 10(15) cm(-3). We confirmed the dependence of the current density on the dopant concentration and the hole lifetime in the buffer layer numerically. The model was extended to the case where BPD converted to threading edge dislocations (TEDs) in the substrate, and the relational expression between the depth of the BPD-TED conversion position in the substrate and the current density at which BPD expanded to 1SSF was obtained. The model suggested that it will be an effective technique for suppressing forward bias degradation by shorter lifetime and deeper BPD-TED conversion position in the substrate.