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Analytic model of spalling technique for thickness-controlled separation of single-crystalline semiconductor layers

机译:单晶半导体层厚度受控分离的剥落技术解析模型

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Thickness-controlled separation of a thin layer of single-crystalline semiconductors from its bulk substrate has been developed for the co-integration of compound semiconductors with silicon-based integrated circuit chips and the fabrication of high-performance flexible devices. Recently, a controlled spalling technique that can mechanically separate single-crystalline semiconductor layers has been actively demonstrated because of the process simplicity and the less limitation on the use of materials. Here, we developed an analytic model that can precisely estimate the spalling depth. In this model, the spalling depth was calculated from the thermodynamic equilibrium condition in which total strain energy accumulated in a separated layer is balanced with the crystal binding energy. We experimentally investigated the dependence of the spalling depth on the stressor layer thickness and stress, and we compared the empirical results with the proposed analytic model. We also verified that the crack initiation angle of the spalling process is determined by the binding energy contrast in the main crystal orientations in the semiconductor.
机译:已经开发了厚度控制的单晶半导体薄层与其块状衬底的分离,以将化合物半导体与硅基集成电路芯片共集成并制造高性能柔性器件。最近,由于工艺简单和对材料使用的限制较少,已经积极地证明了可以机械地分离单晶半导体层的受控剥落技术。在这里,我们开发了一个可以精确估计剥落深度的分析模型。在该模型中,剥落深度是根据热力学平衡条件计算得出的,在该条件下,堆积在分离层中的总应变能与晶体结合能平衡。我们通过实验研究了剥落深度对应力源层厚度和应力的依赖性,并将实证结果与所提出的分析模型进行了比较。我们还验证了剥落过程的裂纹萌生角是由半导体主要晶体取向中的结合能对比决定的。

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