CMOS VCO's for PLL frequency synthesis in GHz digital mobile radio communications

摘要

CMOS inductorless voltage controlled oscillator (VCO) design is discussed with the emphasis on low-noise, low-power, gigahertz-range circuits suitable for portable wireless equipment. The paper considers three VCO structures-one simple ring oscillator and two differential circuits. The design methodology followed optimization for high-speed and low-power consumption. The proposed linearized MOSFET model allows the accurate prediction of the operating frequency while the phase noise evaluation technique makes it possible to determine, through simulation, the relative phase-noise performance of different oscillator architectures. The measurement results of three VCO's implemented in 1.2-/spl mu/m CMOS technology confirm with the simulation predictions. The prototype VCO's exhibits 926-MHz operation with -83 dBc/Hz phase noise (@ 100 kHz carrier offset) and 5 mW (5 V) power consumption.