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Low-power BiCMOS circuits for high-speed interchip communication

机译:用于高速芯片间通信的低功耗BiCMOS电路

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摘要

A universal BiCMOS low-voltage-swing transceiver (driver/receiver) with low on-chip power consumption is reported. Using a 3.3 V supply, the novel transceiver can drive/receive signals from several low-voltage-swing transceivers with termination voltages ranging from 5 V down to 2 V and frequencies well above 1 GHz. Measured results of test circuits fabricated in 0.8-/spl mu/m BiCMOS technology are also presented.
机译:据报道,通用BiCMOS低压摆幅收发器(驱动器/接收器)具有较低的片内功耗。使用3.3 V电源,新型收发器可以驱动/接收来自几个低压摆幅收发器的信号,其端接电压范围为5 V至2 V,频率远高于1 GHz。还介绍了以0.8- / spl mu / m BiCMOS技术制造的测试电路的测量结果。

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