A 4.25-Gb/s CMOS fiber channel transceiver with asynchronoustree-type demultiplexer and frequency conversion architecture

摘要

A single-chip 1.25-Gb/s 32:1, 1:32 transceiver, as specified innthe emerging American National Standards Institute fiber channelnstandard, has been developed using 0.25-Μm CMOS technology. Newlyndeveloped features contributing to the achievement of 4.25-Gb/snoperations include: 1) an asynchronous tree-type 1:8 demultiplexer, 2)nan 8-10 bit parallel-to-parallel frequency conversion circuit, and 3)ncomma detection and word alignment logic. The transceiver consumes 600nmW in 4.25-Gb/s operations with a 2.5 V supply. This design helpsnachieve higher speed operations and only half the power dissipation ofnthe fastest previously reported CMOS fiber channel design that includesnan 8B10B encoder and a 10B8B decoder