A direct digital synthesizer with an on-chip D/A-converter

摘要

A direct digital synthesizer (DDS) with an on-chip D/A converter is designed and processed in a 0.8 /spl mu/m BiCMOS. The on-chip D/A converter avoids delays and line loading caused by interchip connections. At the 150 MHz clock frequency, the spurious free dynamic range (SFDR) is better than 60 dBc at low synthesized frequencies, decreasing to 52 dBc worst case at high synthesized frequencies in the output frequency band (0-75 MHz). The DDS covers a bandwidth from DC to 75 MHz in steps of 0.0349 Hz with the frequency switching speed of 140 ns. The chip has a complexity of 19100 transistors with a die/core area of 12.2/3.9 mm/sup 2/. The power dissipation is 0.6 W at 150 MHz at 5 V. The maximum operating clock frequency of the chip is 170 MHz.