A direct digital synthesizer with an on-chip D/A-converter

摘要

A direct digital synthesizer (DDS) with an on-chip D/A converternis designed and processed in a 0.8 Μm BiCMOS. The on-chip D/Anconverter avoids delays and line loading caused by interchipnconnections. At the 150 MHz clock frequency, the spurious free dynamicnrange (SFDR) is better than 60 dBc at low synthesized frequencies,ndecreasing to 52 dBc worst case at high synthesized frequencies in thenoutput frequency band (0-75 MHz). The DDS covers a bandwidth from DC ton75 MHz in steps of 0.0349 Hz with the frequency switching speed of 140nns. The chip has a complexity of 19100 transistors with a die/core areanof 12.2/3.9 mm2. The power dissipation is 0.6 W at 150 MHz atn5 V. The maximum operating clock frequency of the chip is 170 MHz