A 150-MHz graphics rendering processor with 256-Mb embedded DRAM

摘要

A 150-MHz graphics rendering processor with an integrated 256-Mbnembedded DRAM, delivering a rendering rate of 75 M polygons/s, isnpresented, 287.5 M transistors are integrated on a 21.3×21.7 mmn2 die in a 0.18-Μm embedded DRAM CMOS process with sixnlayers of metal. Design methodologies for hierarchical electrical andnphysical design of this very large-scale IC, including powerndistribution, fully hierarchical timing design, and verificationnutilizing a newly developed nonlinear model, clock design, propagationndelay, and crosstalk noise management in multi-millimeter RCntransmission lines, are presented