A 5.2-GHz CMOS receiver with 62-dB image rejection

摘要

A 5.2-GHz CMOS receiver employs a double downconversion heterodynenarchitecture with a local oscillator frequency of 2.6 GHz and appliesnoffset cancellation to the baseband amplifiers. Placing the image aroundnthe zero frequency, the receiver achieves an image rejection of 62 dBnwith no external components while minimizing the flicker noisenupconversion in the first mixing operation. Realized in a 0.25-Μmndigital CMOS technology, the circuit exhibits a noise figure of 6.4 dB,nan IP3 of -15 dBm, and a voltage conversion gain of 43 dB,nwhile draining 29 mW from a 2.5-V supply