A 1.5-V 900-MHz monolithic CMOS fast-switching frequencysynthesizer for wireless applications

摘要

A new architecture for phase-locked loop frequency synthesizersnwhich employs a switchable-capacitor array to tune the output frequencynand a dual-path loop filter operating in the capacitance domain isnproposed. It provides many advantages, including simplified analogncircuitry, low supply voltage, low power consumption, small chip area,nfast frequency switching, and high immunity of substrate noise.nImplemented in a standard 0.5-Μm CMOS process, a fully integratednfractional-N synthesizer prototype with a third-order sigma-deltanmodulator is designed for 1.5 V and consumes 30 mW. The total chip areanis, 0.9 × 1.1 mm2. The settling time is less than 100nΜs and the phase noise is -118 dBc/Hz at 600-kHz offset