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A CMOS highly linear channel-select filter for 3G multistandardintegrated wireless receivers

机译:用于3G多标准集成无线接收器的CMOS高度线性通道选择滤波器

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A new approach for designing digitally programmable CMOSnintegrated baseband filters is presented. The proposed techniquenprovides a systematic method for designing filters exhibiting highnlinearity and low power. A sixth-order Butterworth low-pass filter withn14-bit bandwidth tuning range is designed for implementing the basebandnchannel-select filter in an integrated multistandard wireless receiver.nThe filter consumes a current of 2.25 mA from a 2.7-V supply andnoccupies an area of 1.25 mm2 in a 0.5-Μm chip. Thenproposed filter design achieves high spurious free dynamic rangesn(SFDRs) of 92 dB for PDC (IS-54), 89 dB for GSM, 84 dB for IS-95, and 80ndB for WCDMA
机译:提出了一种设计数字可编程CMOS集成基带滤波器的新方法。所提出的技术为设计具有高线性度和低功耗的滤波器提供了一种系统的方法。设计了具有n14位带宽调谐范围的六阶巴特沃斯低通滤波器,用于在集成的多标准无线接收器中实现基带通道选择滤波器.n该滤波器从2.7V电源消耗2.25 mA的电流,占用的面积为1.25 0.5毫米芯片中的mm2。然后提出的滤波器设计实现了PDC(IS-54)为92 dB,GSM为89 dB,IS-95为84 dB,WCDMA为80ndB的高无杂散动态范围n(SFDR)

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