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首页> 外文期刊>IEEE Journal of Solid-State Circuits >Low-voltage high-speed switched-capacitor circuits without voltage bootstrapper
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Low-voltage high-speed switched-capacitor circuits without voltage bootstrapper

机译:无电压自举电路的低压高速开关电容器电路

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Low-voltage high-speed switched-capacitor (SC) circuit design without using voltage bootstrapper is presented. The basic building block used for low-voltage SC circuit design is the auto-zeroed integrator (AZI), which can work at both low voltage and high sampling frequency. With this method, two low-voltage SC systems were successfully designed and implemented in 1.2-/spl mu/m CMOS technology. The first one is a fully differential SC bandpass biquad working at 1.5 V and 5.0-MHz clock frequency. The measured Q value is 8.0 at the center frequency of 833 kHz. The second one is a fully differential fourth-order bandpass /spl Delta//spl Sigma/ modulator that also works at 1.5 V and 5.0 MHz. Its measured third-order intermodulation is less than -78 dBc due to the low distortion characteristic of AZI. The measured signal-to-noise ratio of the modulator is 61 dB within the narrow band of 25 kHz centered at 1.25 MHz.
机译:提出了不使用电压自举电路的低压高速开关电容器(SC)电路设计。自动调零积分器(AZI)是用于低压SC电路设计的基本构件,它可以在低压和高采样频率下工作。使用这种方法,成功地设计出了两个低压SC系统,并以1.2- / spl mu / m CMOS技术实现了该系统。第一个是工作在1.5 V和5.0 MHz时钟频率的全差分SC带通双二阶。在833 kHz的中心频率下测得的Q值为8.0。第二个是全差分四阶带通/ spl Delta // spl Sigma /调制器,也可在1.5 V和5.0 MHz下工作。由于AZI的低失真特性,其测得的三阶互调小于-78 dBc。在以1.25 MHz为中心的25 kHz窄带内,调制器的测得信噪比为61 dB。

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