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An On-Chip Active Decoupling Circuit to Suppress Crosstalk in Deep-Submicron CMOS Mixed-Signal SoCs

机译:片上有源去耦电路可抑制深亚微米CMOS混合信号SoC中的串扰

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摘要

A decoupling circuit using an operational amplifier is proposed to suppress substrate crosstalk in mixed-signal system-on-chip (SoC) devices. It overcomes the parasitic inductance problem of on-chip capacitor decoupling. The effect of the proposed decoupling circuit is not limited by parasitic line impedance. A 0.13-μm CMOS test chip showed that substrate noise at frequencies from 40 MHz to 1 GHz was incrementally suppressed by sequentially activating three of the proposed circuits in parallel. The power dissipation of each circuit was 3.3 mW at a 1.0-V power supply. The test chip measurement showed that the proposed decoupling reduced crosstalk by 31% at 200 MHz, whereas it was reduced by 4.4% with capacitor decoupling. This 7:1 ratio, or 17 dB, corresponds to the gain of the opamp. Design of the opamp and its feedback loop for active decoupling is simple, making the opamp useful for SoC applications.
机译:提出了一种使用运算放大器的去耦电路来抑制混合信号片上系统(SoC)器件中的基板串扰。它克服了片上电容器去耦的寄生电感问题。提出的去耦电路的效果不受寄生线路阻抗的限制。 0.13-μmCMOS测试芯片显示,通过依次并行激活三个建议的电路,可以逐渐抑制40 MHz至1 GHz频率的基板噪声。在1.0V电源下,每个电路的功耗为3.3 mW。测试芯片的测量结果表明,建议的去耦在200 MHz时可将串扰降低31%,而在电容器去耦时则可将串扰降低4.4%。这个7:1的比率,即17 dB,对应于运算放大器的增益。用于有源去耦的运算放大器及其反馈环路的设计非常简单,从而使运算放大器可用于SoC应用。

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