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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A Single-Chip CMOS Transceiver for UHF Mobile RFID Reader
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A Single-Chip CMOS Transceiver for UHF Mobile RFID Reader

机译:用于UHF移动RFID读取器的单芯片CMOS收发器

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摘要

This paper describes a single-antenna low-power single-chip radio frequency identification (RFID) reader for mobile phone applications. The reader integrates an RF transceiver, data converters, a digital baseband modem, an MPU, memory, and host interfaces. The direct conversion RF receiver architecture with the highly linear RF front-end circuit and DC offset cancellation circuit is used to give good immunity to the large transmitter leakage. It is suitable for a mobile phone reader with single-antenna architecture and low-power reader solution. The transmitter is implemented in the direct ${I} / {Q}$ up-conversion architecture. The frequency synthesizer based on a fractional-N phase-locked-loop topology offering 900 MHz quadrature LO signals is also integrated with the RF transceiver. The reader is fabricated in a 0.18 $mu{hbox {m}}$ CMOS technology, and its die size is 4.5 mm $times ,$5.3 mm including electrostatic discharge I/O pads. The reader consumes a total current of 89 mA apart from the external power amplifier with 1.8 V supply voltage. It achieves an 8 dBm P1dB, an 18.5 dBm IIP3, and a maximum transmitter output power of 4 dBm.
机译:本文介绍了一种用于手机应用的单天线低功耗单芯片射频识别(RFID)阅读器。该阅读器集成了RF收发器,数据转换器,数字基带调制解调器,MPU,存储器和主机接口。具有高度线性的RF前端电路和DC偏移消除电路的直接转换RF接收器体系结构具有良好的抗干扰能力,可防止较大的发送器泄漏。它适用于具有单天线架构和低功耗阅读器解决方案的手机阅读器。发送器以直接$ {I} / {Q} $上变频架构实现。射频合成器还集成了基于分数N锁相环拓扑结构的频率合成器,可提供900 MHz正交LO信号。该读取器采用0.18 µmu {hbox {m}} $ CMOS技术制造,其管芯尺寸为4.5毫米x 5.3毫米,包括静电放电I / O焊盘。除了使用1.8 V电源电压的外部功率放大器外,阅读器消耗的总电流为89 mA。它实现了8 dBm P1dB,18.5 dBm IIP3和最大4 dBm的发射机输出功率。

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