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首页> 外文期刊>Solid-State Circuits, IEEE Journal of >An Energy-Efficient Time-Domain Incremental Zoom Capacitance-to-Digital Converter
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An Energy-Efficient Time-Domain Incremental Zoom Capacitance-to-Digital Converter

机译:节能时域增量变焦电容到数字转换器

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This article presents an incremental two-step capacitance-to-digital converter (CDC) with a time-domain $Delta Sigma $ modulator (TD $Delta Sigma ext{M}$ ). Unlike the classic two-step CDCs, this work replaces the operational transconductance amplifier (OTA)-based active- RC integrator by a voltage-controlled oscillator (VCO)-based integrator, which is mostly digital and low-power. Featuring the infinite dc gain and intrinsic quantization in phase domain, this TD $Delta Sigma ext{M}$ enables a CDC design achieving 76-dB SNDR while requiring only a first-order loop, and a low oversampling ratio (OSR) of 15. Fabricated in 40-nm CMOS technology, the prototype CDC achieves a resolution of 0.29 fF while dissipating only 0.083 nJ/conversion, which improves the energy efficiency by over two times comparing to the similar performance designs.
机译:本文介绍了具有时域的增量两步电容到数字转换器(CDC)<内联公式XMLNS:MML =“http://www.w3.org/1998/math/mathml”xmlns:xlink =“http://www.w3.org/1999/xlink”> $ delta sigma $ 调制器(TD.<内联公式XMLNS:MML =“http://www.w3.org/1998/math/mathml”xmlns:xlink =“http://www.w3.org/1999/xlink”> $ delta sigma text {m} $ )。与经典的两步CDC不同,这项工作取代了基于活动的运行跨导放大器(OTA) rc 积分器通过电压控制的振荡器(VCO)积分器,主要是数字和低功耗。在阶段域中具有无限的直流增益和内在量化,这是这个TD<内联公式XMLNS:MML =“http://www.w3.org/1998/math/mathml”xmlns:xlink =“http://www.w3.org/1999/xlink”> $ delta sigma text {m} $ 使CDC设计能够实现76-DB SNDR,同时仅需要一阶环路,并且低过采样比(OSR)为15.在40-NM CMOS技术中制造,原型CDC在0.29 FF的分辨率下实现0.083 NJ /转换,通过与类似的性能设计相比,通过两倍提高能量效率。

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