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首页> 外文期刊>IEEE Journal of Solid-State Circuits >SAW-Less Analog Front-End Receivers for TDD and FDD
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SAW-Less Analog Front-End Receivers for TDD and FDD

机译:用于TDD和FDD的SAW-Less模拟前端接收器

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摘要

A multistandard SAW-less receiver is designed exploring a current-mode architecture. A class-AB common-gate transformer-based low-noise transconductor amplifier (LNTA) is used to provide high linearity and harmonic filtering. A resonant passive mixer is adopted in order to allow the current-mode operation and improve the harmonic rejection. A low-power divider with intrinsic 25% duty-cycle is introduced to drive the passive mixer. A second-order Rauch biquad with complex poles makes-up the IQ blocker tolerant baseband. The receiver is designed to be suitable for SAW-less TDD and typical FDD applications with 3.8 and 1.9 dB of NF and $>hbox{18}$ and $>hbox{16 dBm}$ of IIP3, respectively, using only 32 mW for each receiver.
机译:设计了一种多标准的无SAW接收器,以探索电流模式架构。基于AB类共栅变压器的低噪声跨导放大器(LNTA)用于提供高线性度和谐波滤波。采用谐振无源混频器以允许电流模式操作并改善谐波抑制。引入具有固有25%占空比的低功耗分压器来驱动无源混频器。具有复数极点的二阶Rauch双二阶构成了IQ阻滞剂耐受的基带。该接收器设计用于无SAW的TDD和典型FDD应用,分别具有3.8和1.9 dB的NF以及$> hbox {18} $和$> hbox {16 dBm} $的IIP3,仅使用32 mW的IIP3。每个接收器。

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