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首页> 外文期刊>Solid-State Circuits, IEEE Journal of >An ECG-on-Chip With 535 nW/Channel Integrated Lossless Data Compressor for Wireless Sensors
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An ECG-on-Chip With 535 nW/Channel Integrated Lossless Data Compressor for Wireless Sensors

机译:具有535 nW /通道集成无损数据压缩器的ECG片上无线传感器

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摘要

This paper presents a low-power ECG recording system-on-chip (SoC) with on-chip low-complexity lossless ECG compression for data reduction in wireless/ambulatory ECG sensor devices. The chip uses a linear slope predictor for data compression, and incorporates a novel low-complexity dynamic coding-packaging scheme to frame the prediction error into fixed-length 16 bit format. The proposed technique achieves an average compression ratio of 2.25× on MIT/BIH ECG database. Implemented in a standard 0.35 µm process, the compressor uses 0.565 K gates/channel occupying 0.4 mm for four channels, and consumes 535 nW/channel at 2.4 V for ECG sampled at 512 Hz. Small size and ultra-low-power consumption makes the proposed technique suitable for wearable ECG sensor applications.
机译:本文介绍了一种低功耗ECG片上记录系统(SoC),具有片上低复杂度无损ECG压缩功能,可减少无线/动态ECG传感器设备中的数据。该芯片使用线性斜率预测器进行数据压缩,并结合了新颖的低复杂度动态编码打包方案,以将预测误差成帧为固定长度的16位格式。所提出的技术在MIT / BIH ECG数据库上实现了2.25倍的平均压缩率。该压缩机以0.35 µm的标准工艺实施,使用0.565 K的门/通道占用4毫米,占据4个通道,在2.4 V时以512 Hz采样的ECG消耗535 nW /通道。小尺寸和超低功耗使所提出的技术适用于可穿戴式ECG传感器应用。

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