首页> 外文期刊>IEEE Journal of Solid-State Circuits >A 110 nW Resistive Frequency Locked On-Chip Oscillator with 34.3 ppm/°C Temperature Stability for System-on-Chip Designs
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A 110 nW Resistive Frequency Locked On-Chip Oscillator with 34.3 ppm/°C Temperature Stability for System-on-Chip Designs

机译:具有34.3 ppm /°C温度稳定性的110 nW电阻频率锁定片上振荡器,用于片上系统设计

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This work presents a sub-μW on-chip oscillator for fully integrated system-on-chip designs. The proposed oscillator introduces a resistive frequency locked loop topology for accurate clock generation. In this topology, a switched-capacitor circuit is controlled by an internal voltage-controlled oscillator (VCO), and the equivalent resistance of this switched-capacitor is matched to a temperature-compensated on-chip resistor using an ultra-low power amplifier. This design yields a temperature-compensated frequency from the internal VCO. The approach eliminates the traditional comparator from the oscillation loop; this comparator typically consumes a significant portion of the total oscillator power and limits temperature stability in conventional RC relaxation oscillators due to its temperature-dependent delay. A test chip is fabricated in 0.18 μm CMOS that exhibits a temperature coefficient of 34.3 ppm/°C with long-term stability of less than 7 ppm (12 second integration time) while consuming 110 nW at 70.4 kHz. A radio transmitter circuit that uses the proposed oscillator as a baseband timing source is also presented to demonstrate a system-on-chip design using this oscillator.
机译:这项工作提出了一种用于完全集成的片上系统设计的低于μW的片上振荡器。所提出的振荡器引入了一种电阻频率锁定环路拓扑,以精确地产生时钟。在这种拓扑结构中,开关电容器电路由内部压控振荡器(VCO)控制,并且该开关电容器的等效电阻使用超低功率放大器与温度补偿的片上电阻器匹配。这种设计从内部VCO产生温度补偿的频率。该方法消除了振荡回路中的传统比较器。该比较器通常消耗总振荡器功率的很大一部分,并且由于其与温度有关的延迟而限制了常规RC弛豫振荡器的温度稳定性。用0.18μmCMOS制造的测试芯片,其温度系数为34.3 ppm /°C,长期稳定性低于7 ppm(12秒积分时间),而在70.4 kHz时消耗110 nW。还展示了使用拟议的振荡器作为基带定时源的无线电发射机电路,以演示使用该振荡器的片上系统设计。

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