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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A 65 nm CMOS Wideband Radio Receiver With -Based A/D-Converting Channel-Select Filters
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A 65 nm CMOS Wideband Radio Receiver With -Based A/D-Converting Channel-Select Filters

机译:具有基于A / D转换通道选择滤波器的65 nm CMOS宽带无线电接收器

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This paper presents a wideband quadrature radio receiver employing -based A/D-converting channel-select filters (ADCSFs). The output of the quadrature passive mixer is directly connected to the input of the ADCSFs, where a first-order modulator is incorporated into a fourth-order Butterworth channel-select filter (CSF) to provide sufficient dynamic range for a cellular system. A design methodology for the ADCSF is derived, where the transfer function of the CSF is preserved. The 65 nm CMOS receiver has a frequency range of 0.6–3.0 GHz and can be programmed to support the 2xLTE20, LTE20, and LTE10 bandwidths. The receiver noise figure varies from 2.3 to 3.9 dB, with a current consumption in 2xLTE20 mode between 33 mA at 0.6 GHz and 44 mA at 3.0 GHz from a 1.2 V supply, including 10–21 mA for LO phase generation and distribution. The SNDR is 47–51 dB at an LO frequency of 1.8 GHz.
机译:本文提出了一种采用基于A / D转换信道选择滤波器(ADCSF)的宽带正交无线电接收机。正交无源混频器的输出直接连接到ADCSF的输入,其中将一阶调制器合并到四阶Butterworth通道选择滤波器(CSF)中,以为蜂窝系统提供足够的动态范围。推导了ADCSF的设计方法,其中保留了CSF的传递函数。 65纳米CMOS接收器的频率范围为0.6–3.0 GHz,可以进行编程以支持2xLTE20,LTE20和LTE10带宽。接收器的噪声系数在2.3至3.9dB之间变化,在2xLTE20模式下,使用1.2V电源在0.6GHz时的电流消耗为33mA,而在3.0GHz时的电流消耗为44mA,其中包括10-21mA的LO相产生和分配。在1.8 GHz的LO频率下,SNDR为47-51 dB。

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