A straightforward parallel-in, serial-out filter with a junction charge-coupled device and an integrated clock driver

摘要

The design of a parallel-in, serial-out filter with 23 coefficients is described. A single 23-cell-long junction charge-coupled device is used as the delay line, with provisions in 12 cells for the injection of electrical charge packets. Experimental results on devices with integrated input circuitry and clock drivers show a dynamic range of 50 dB and good agreement with the calculated bandpass characteristic at a clock frequency of 17.6 MHz.