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A Low Quiescent Current, Low THD+N Class-D Audio Amplifier With Area-Efficient PWM-Residual-Aliasing Reduction

机译:低静态电流,低THD + N D类音频放大器,具有面积有效的PWM残留混叠功能

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摘要

An area-efficient pulsewidth modulation (PWM)-residual-aliasing reduction technique is proposed for Class-D audio amplifiers by utilizing a low-complexity feed-forward path to cancel the PWM high-frequency components inside the feedback loop. The proposed technique reduces the PWM-residual-aliasing distortion without increasing the required switching frequency or power-hungry controller circuits, thereby lowering both the quiescent current and total harmonic distortion plus noise (THD+N) in Class-D audio amplifiers. Measurement results show that the proposed technique improves the THD+N of second-order Class-D amplifiers by 16.2 dB with a 1-kHz input; in addition, the Class-D amplifier of this paper achieves a minimum THD+N of 0.0032% while operating at a 215-kHz switching frequency, resulting in a reduction in quiescent current of more than 33%. Compared with other state of the arts, this paper implemented in 0.5-$mu ext{m}$CMOS technology features a competitive THD+N while consuming the lowest quiescent current of 0.96 mA and occupying the smallest active area of 0.49 mm2.
机译:通过利用低复杂度前馈路径来消除反馈环路内的PWM高频分量,为D类音频放大器提出了一种面积有效的脉宽调制(PWM)残留混叠降低技术。所提出的技术可在不增加所需开关频率或耗电控制器电路的情况下减少PWM残留混叠失真,从而降低D类音频放大器的静态电流和总谐波失真加噪声(THD + N)。测量结果表明,所提出的技术在输入为1kHz时将二阶D类放大器的THD + N提高了16.2 dB。此外,本文的D类放大器在215 kHz的开关频率下工作时,可实现0.0032 %的最小THD + N,从而使静态电流降低了33%以上。与其他现有技术相比,本文以0.5- n $ mu text {m} $ nCMOS技术具有具有竞争力的THD + N,同时消耗的最低静态电流为0.96 mA,并且占用的最小有效面积为0.49 mm n 2 n。

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