For the original article see ibid., vol.24, no.4, p.1158-9 (1989). The authors of the above-titled paper proposed a computation scheme for updating path metrics in solid-state Viterbi decoders. They formally showed that the permutation of items in memory is a cyclic address rotation, and they described a hardware implementation based on the use of a barrel shifter. The commenter points out that the use of cyclic address rotation for Viterbi decoders has already been noted in the literature and shows that even greater VLSI area reduction is possible through the use of a tree shifter.
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